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dbis
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Publications
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2009
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Data Processing on FPGAs
VLDB 2009 Author Feedback
discussed is complex enough to allow us to address all the key aspects of the design space: parallelism, asynchronous design, mapping operators to gates, etc. which is the objective of the paper. The operator [...] FPGAs. This is part of future work. D3 = The design is cost effective but, as the paper shows, not for all uses. To deal with heterogeneity, there are tools in the market that translate, e.g., C into VHDL [...] VHDL and then into FPGA circuits. These tools hide the heterogeneity in the designs in the same way regular compilers hide the differences among CPUs. D5 = An unused FPGA located in the socket of a core …